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PD - 94361
IRFP4710
HEXFET(R) Power MOSFET
Applications l High frequency DC-DC converters l Motor Control l Uninterruptible Power Supplies Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current
l
VDSS
100V
RDS(on) max
0.014
ID
72A
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
72 51 300 190 1.2 20 8.2 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.81 --- 40
Units
C/W
Notes
through
are on page 8
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1
01/08/02
IRFP4710
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 100 --- --- 3.5 --- --- --- --- Typ. --- 0.11 0.011 --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, I D = 1mA 0.014 VGS = 10V, ID = 45A 5.5 V VDS = VGS, ID = 250A 1.0 VDS = 95V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 35 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 110 43 40 35 130 41 38 6160 440 250 1580 280 430 Max. Units Conditions --- S VDS = 50V, ID = 45A 170 ID = 45A --- nC VDS = 50V --- VGS = 10V, --- VDD = 50V --- ID = 45A ns --- RG = 4.5 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 80V, = 1.0MHz --- VGS = 0V, VDS = 0V to 80V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
190 45 20
Units
mJ A mJ
Diode Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 72 --- --- showing the A G integral reverse --- --- 300 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 45A, VGS = 0V --- 74 110 ns TJ = 25C, IF = 45A --- 180 260 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFP4710
1000
I D , Drain-to-Source Current (A)
100
10
1
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 8.0V 7.5V 7.0V 6.5V BOTTOM 6.0V TOP
1000
100
VGS 15V 12V 10V 8.0V 7.5V 7.0V 6.5V BOTTOM 6.0V TOP
10
6.0V
6.0V
0.1
0.01 0.1
20s PULSE WIDTH T = 25 C
J 1 10 100
1 0.1
20s PULSE WIDTH T = 175 C
J 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 75A
I D , Drain-to-Source Current (A)
100
TJ = 175 C
2.5
2.0
10
1.5
TJ = 25 C
1
1.0
0.5
0.1 6.0
V DS = 50V 20s PULSE WIDTH 9.0 7.0 8.0 10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFP4710
10000 20 VGS = 0V, f = 1 MHZ Ciss = C + C , C gs gd ds SHORTED Crss = C gd Coss = C + C ds gd
ID = 45A
VGS , Gate-to-Source Voltage (V)
8000
16
VDS = 80V VDS = 50V VDS = 20V
C, Capacitance(pF)
Ciss
6000
12
4000
8
2000
4
Coss
0 1
Crss
0 10 100 0 40 80
FOR TEST CIRCUIT SEE FIGURE 13
160 120 200
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
ID , Drain-to-Source Current (A)
100
100
TJ = 175 C
10
100sec 10
1
TJ = 25 C
1msec 1 Tc = 25C Tj = 175C Single Pulse 1 10 10msec
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6
0.1
100
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP4710
80
VDS VGS
RD
D.U.T.
+
60
RG
-VDD
I D , Drain Current (A)
10V
40
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
20
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
(Z thJC )
1
D = 0.50
Thermal Response
0.20 0.1 0.10 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 0.01
0.01 0.00001
Notes: 1. Duty factor D = 2. Peak T t1 / t 2
J = P DM x Z thJC
P DM t1 t2 +T C
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFP4710
350
1 5V
EAS , Single Pulse Avalanche Energy (mJ)
300
VD S
L
D R IV E R
250
TOP BOTTOM ID 18A 32A 45A
RG
VV 2 0GS
D .U .T IA S tp 0 .0 1
+ - VD D
200
A
150
Fig 12a. Unclamped Inductive Test Circuit
100
50
V (B R )D SS tp
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
50K 12V .2F .3F
10 V
QGS VG QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFP4710
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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7
IRFP4710
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
1 5.9 0 (.6 26 ) 1 5.3 0 (.6 02 ) -B3.6 5 (.14 3) 3.5 5 (.14 0) 0.2 5 (.0 10 ) M -A5 .50 (.21 7) 2 0 .30 (.80 0) 1 9 .70 (.77 5) 1 2 3 -C14.8 0 (.5 83 ) 14.2 0 (.5 59 ) 4 .30 (.1 70 ) 3 .70 (.1 45 )
LE AD A S SIG N ME NTS 1 2 3 4 G ATE DR A IN SO UR C E DR A IN
-DDBM 5 .30 (.20 9) 4 .70 (.18 5) 2 .50 (.0 89 ) 1 .50 (.0 59 ) 4
2X
5.50 (.2 1 7) 4.50 (.1 7 7)
NO TE S: 1 DIM EN SION ING & TO LER AN CING P ER A N SI Y14.5M , 1982. 2 CON TR OLLIN G D IM EN SIO N : IN CH . 3 CON F OR M S TO JED E C OU TLIN E TO-247-A C .
2 .40 (.0 94 ) 2 .00 (.0 79 ) 2X 5.45 (.2 1 5) 2X
1 .4 0 (.0 56 ) 3 X 1 .0 0 (.0 39 ) 0.2 5 (.01 0) M 3 .40 (.1 33 ) 3 .00 (.1 18 ) C AS
0 .8 0 (.0 31 ) 3X 0 .4 0 (.0 16 ) 2.60 (.10 2) 2.20 (.08 7)
TO-247AC Part Marking Information
EXAMPLE: THIS IS AN IRFPE30 WITH ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 2000 IN THE ASSEMBLY LINE "H" PART NUMBER INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
IRFPE30
56 035H 57
DATE CODE YEAR 0 = 2000 WEEK 35 LINE H
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. Starting TJ = 25C, L = 190H RG = 25, I AS = 45A, VGS = 10V. ISD 45A, di/dt 420A/s, VDD V(BR)DSS, TJ 175C .
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging
time as Coss while VDS is rising from 0 to 80% VDSS .
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 01/02
8
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